Telecommunications Science    
   
Table of contents ☛
(Prev) IBM 702IBM 704 (Next)

IBM 7030 Stretch

IBM 7030 maintenance console at the Musée des Arts et Métiers, Paris
IBM 7030 maintenance console at the Musée des Arts et Métiers, Paris

The IBM 7030, also known as Stretch, was IBM's first transistorized supercomputer. Originally designed to meet a requirement formulated by Edward Teller at Lawrence Livermore, the first example was delivered to Los Alamos National Laboratory in 1961, and a second customized version, the IBM 7950 Harvest, to the National Security Agency in 1962.

Originally priced at $13.5 million, its failure to meet its aggressive performance estimates forced the price to be dropped to only $7.78 million and its withdrawal from sales to customers beyond those having already negotiated contracts. Even though the 7030 was much slower than expected, it was the fastest computer in the world from 1961 until the first CDC 6600 became operational in 1964. PCWorld magazine named Stretch as one of the biggest project management failures in IT history.[1]

In spite of Stretch's failure to meet its own performance goals, it served as the basis for many of the design features of the fantastically successful IBM System/360, which shipped in 1964 and never secured the title of world's fastest computer for IBM. The project lead was initially blackballed for his role in the "failure", but as the success of the 360 became obvious he was given an official apology and was made an IBM Fellow.

Contents

Development history

In early 1955, Dr. Edward Teller of the University of California Radiation Laboratory wanted a new scientific computing system for three-dimensional hydrodynamic calculations. Proposals were requested from IBM and UNIVAC for this new system, to be called Livermore Automatic Reaction Calculator or LARC. According to IBM salesman Cuthbert Hurd, such a system would cost roughly $2.5 million and would run at one to two MIPS. Delivery was to be two to three years after the contract was signed.[2]

At IBM, a small team at Poughkeepsie including John Griffith and Gene Amdahl worked on the design proposal. Just after they finished and were about to present the proposal, Ralph Palmer stopped them and said, "It's a mistake."[2] The proposed design would have been built with either point-contact transistors or surface barrier transistors, both likely to be soon outperformed by the then newly invented diffusion transistors.[3]

IBM returned to Livermore and stated that they were withdrawing from the contract, and instead proposed a dramatically better system, "We are not going to build that machine for you; we want to build something better! We do not know precisely what it will take but we think it will be another million dollars and another year, and we do not know how fast it will run but we would like to shoot for ten million instructions per second."[4] Livermore was not impressed, and in May 1955 they announced that UNIVAC had won the LARC contract, now called the Livermore Automatic Research Computer. LARC would eventually be delivered in June 1960.[5]

In September 1955, fearing that Los Alamos National Laboratory might also order a LARC, IBM submitted a preliminary proposal for a high-performance binary computer based on the improved version of the design that Livermore had rejected, which they received with interest. In January 1956, Project Stretch was formally initiated. In November 1956, IBM won the contract with the aggressive performance goal of a "speed at least 100 times the IBM 704" (i.e. 4 MIPS). Delivery was slated for 1960.[5]

During design, it proved necessary to reduce the clock speeds, making it clear that Stretch could not meet its aggressive performance goals, but estimates of performance ranged from 60 to 100 times the IBM 704. In 1960, the price of $13.5 million was set for the IBM 7030. In 1961, actual benchmarks indicated that the performance of the IBM 7030 was only about 30 times the IBM 704 (i.e. 1.2 MIPS), causing considerable embarrassment for IBM. In May 1961, Tom Watson announced a price cut of all 7030s under negotiation to $7.78 million and immediate withdrawal of the product from further sales.

Its floating-point addition time was 1.38-1.5 microseconds, multiplication time was 2.48-2.70 microseconds, and division time was 9.00-9.90 microseconds.

Technical impact

While the IBM 7030 was not considered successful, it spawned many technologies incorporated in future machines that were highly successful. The Standard Modular System transistor logic was the basis for the IBM 7090 line of scientific computers, the IBM 7070 and 7080 business computers, the IBM 7040 and IBM 1400 lines, and the IBM 1620 small scientific computer. (The 7030 used about 170,000 transistors.) The IBM 7302 Model I Core Storage units were also used in the IBM 7090, IBM 7070 and IBM 7080. Multiprogramming, memory protection, generalized interrupts, the 8-bit byte were all concepts later incorporated in the IBM System/360 line of computers as well as most later CPUs. Stephen Dunwell, the project manager who became a scapegoat when Stretch failed commercially, pointed out soon after the phenomenally successful 1964 launch of System/360 that most of its core concepts were pioneered by Stretch.[6] By 1966 he had received an apology and been made an IBM Fellow, a high honor that carried with it resources and authority to pursue one's desired research.[6] Instruction pipelining, prefetch and decoding, and memory interleaving were used in later supercomputer designs such as the IBM System/360 Models 91, 95 and IBM System/370 Model 195, and the IBM 3090 series as well as computers from other manufacturers. As of 2011, these techniques are still used in most advanced microprocessors starting with the Intel Pentium and the Motorola/IBM PowerPC, as well as in many embedded microprocessors and microcontrollers from various manufacturers.

Customer deliveries

A circuit board from the IBM 7030, in the Bradbury Science Museum, Los Alamos, New Mexico.
  1. Los Alamos Scientific Laboratory (LASL) in April 1961, accepted in May 1961, and used until June 21, 1971.
  2. U.S. National Security Agency in February 1962 as the main CPU of the IBM 7950 Harvest system, used until 1976, when the IBM 7955 Tractor tape system developed problems due to worn cams that could not be replaced.
  3. Lawrence Livermore Laboratory, Livermore, California.
  4. Atomic Weapons Establishment, Aldermaston, England.
  5. U.S. Weather Bureau.
  6. MITRE Corporation, used until August 1971. In the spring of 1972, it was sold to Brigham Young University.
  7. U.S. Navy Dahlgren Naval Proving Ground.
  8. IBM.
  9. Commissariat à l'énergie atomique, France.

The Lawrence Livermore Laboratory's IBM 7030 (except for its core memory) and portions of the MITRE Corporation/Brigham Young University IBM 7030 now reside in the Computer History Museum collection, in Mountain View, California.

Architecture

Data formats

  • Fixed point numbers were variable length, stored in either binary (1 to 64 bits) or decimal (1 to 16 digits) and either unsigned format or sign/magnitude format. In decimal format, digits were variable length "bytes" (4 to 8 bits).
  • Floating point numbers had a 1-bit exponent flag, a 10-bit exponent, a 1-bit exponent sign, a 48-bit magnitude, and a 4-bit sign "byte" in sign/magnitude format.
  • Alphanumeric characters were variable length and could use any character code of 8-bits or less.
  • "Bytes" were variable length (1 to 8 bits).

Instruction format

Instructions were either 32-bit or 64-bit.

Registers

The registers overlaid the first 32 addresses of memory, as shown in the table below.

AddressMnemonicRegisterStored in:
0$Z64-bit ZeroMain Core Storage
1$IT19-bit Interval TimerIndex Core Storage
$TC36-bit Time Clock
2$IA18-bit Interruption AddressMain Core Storage
3$UB18-bit Upper Boundary AddressTransistor Register
$LB18-bit Lower Boundary Address
 1-bit Boundary Control
4 64-bit Maintenance BitsMain Core Storage
5$CA7-bit Channel AddressTransistor Register
6$CPUS19-bit Other CPU BitsTransistor Register
7$LZC7-bit Left Zero countTransistor Register
$AOC7-bit All Ones count
8$LLeft half of 128-bit AccumulatorTransistor Register
9$RRight half of 128-bit Accumulator
10$SB8-bit Accumulator sign - ZZZZSTUV
11$IND64-bit Indicator RegisterTransistor Register
12$MASK64-bit Mask RegisterTransistor Register
13$RM64-bit Remainder RegisterMain Core Storage
14$FT64-bit Factor RegisterMain Core Storage
15$TR64-bit Transit RegisterMain Core Storage
16
...
31		$X0
...
$X15		64-bit Index Registers (sixteen)Index Core Storage

The accumulator and Index registers operated in sign-and-magnitude format.

Memory

Main memory was 16K to 256K 64-bit binary words, in banks of 16K.

The memory was immersion oil-heated/cooled to stabilize its operating characteristics.

Software

  • STRETCH Assembly Program (STRAP)

See also

  • IBM 608, the first commercially available transistorized computing device

References

Citations
  1. ^ Widman, Jake (October 9, 2008). "Lessons Learned: IT's Biggest Project Failures". PCWorld. http://www.pcworld.com/article/152103 /it_project_failures.html. Retrieved October 23, 2012.
  2. ^ a b Evans & 1984 11.
  3. ^ Evans & 1984 12.
  4. ^ Evans & 1984 13.
  5. ^ a b Grey 1999.
  6. ^ a b Simmons & Elsberry 1988, p. 160.
Bibliography
  • Bob Evans, "IBM System/360", The Computer Museum Report, Summer 1984
  • George Gray, "Some Burroughs Transistor Computers", Unisys History Newsletter, Volume 3 Number 1 (March 1999)
  • Simmons, William W.; Elsberry, Richard B. (1988), Inside IBM: the Watson years (a personal memoir), Pennsylvania, USA: Dorrance, ISBN 978-0805931167, http://books.google.com/books?vid=ISB N0805931163. The memoir of a senior IBM executive, giving his recollections of his and IBM's experience from World War II into the 1970s.

External links

(Prev) IBM 702IBM 704 (Next)